Delay on execution

[lagunasol]

Hello, I am new on this forum and also new into the NI Labview world, I hope to be helpful in the future but first, I need some help with many things.

First problem is, I have a project on Labview 2012 which I execute using a host that calls a FPGA vi with the FPGA interface, thing is my program takes around 2-4 miliseconds to execute. What do I mean by this? I will explain. 

The project I am working on, is to activate some TRIACs that are on an AC 240V three phase line (each line has a TRIAC, so there are 3 TRIACs)  by having output pulses from the module NI 9263 so I can vary an output DC voltage at a rectifier bridge of the three phase. The zero crossing I get it by measuring the three phase current of each line with the NI 9227 and the output voltage feedback I  monitore it with the module NI 9215 (max DC voltage around 18.5 volts, using a resistor tu get max 6.54 DC voltage on the NI 9263 and vary voltage from that reference). The program runs with a FPGA PID in order to control the firing angle depending of the set point voltage I want/need

Now, my two issues right now are:

1.- Regardless what angle I get, it always start sending signals at 2.3 - 4.2 ms from the zero cross, In other words, my program starts shooting at 60-90 degrees thinking it is at the exact zero cross. since I am having this delay, I cannot fire in the first 0 - 90 degrees and I am not sure why it is having such delay.

2.- I think this is more of a hardware issue but still, once the program fires a pulse to the optocouple to activate the TRIAC, the sinusoidal signal of each three phase line doesn't cuts. it starts to cut after 1 semicicle and with a lot of noise.

I attach the project in a zip file for a labview 8.6 version. any other information needed please let me know. 

PS: I haven't had any time to take a course, so I have been learning all ober by myself with examples from the Labview example list and the material I have found on NI. In advance Thanks, and sorry for the messy code. 

[OmarIsi]

Hi lagunasol,

Thank you for using forums as your knowledge base. It is very important to us, you and all our clients, take advantage of this site.

If I understood your major problem is that your functional code in the FPGA takes more time than you expected. Am I right? You want to detect the Zero Crossing in each line and give a trigger to the TRIAC with a delay related to alfa, right? Alfa is an integer or it could be a floating number?

Programming FPGAs is kind of difficult but we have a lot of tools and examples to help you to develop your projects.

I can see some details in the program, for example you have four parallel cycles, the first one run just once every time you run FPGA vi (You have a True constant in the terminal condition) while the rest of them run continuously (You have a False constant in the terminal conditions). This is what you’re expecting or you want to modify Alfa each time and recalculate the parameters?

You can try some recommendations to decrease the execution time

When you read the AI0 from module 3 you have a case structure to have a response when signal crossing X axis. But when you read AI1 and AI2 the code in each case structure is executed every time, so you will have a different execution time in each parallel cycle. In this case you can modify the program to have a functional code every time we have a zero crossing or you can synchronize your acquisitions.

You can also check this example for synchronizing different inputs in the examples installed in your equipment. Synchronizing NI 923x Modules.lvproj

In the last part en the cycles where you have a select function and a sequence structure to send the value into the AO for the Module 4, you can replace this two functions by a case structure. Also you can use timing tools, like Loops timer to ensure every loop cycle executes in a known period of time. In this way you could delete the inner while loop in every parallel while.

I can see that in the first frame from the sequence structure you are starting the module 3, but the Module 6 is not initialized it. You need to initialize all the modules to have the measurements. Also you have some indicators, I recommend you to have only the indicators you really need, this may help to reduce the execution time.

You can try with this recommendations, I will follow the case to check if this recommendations helps you to solve the problem or if you need additional information.

Regards, 

[lagunasol]

Hi! First of all... Happy New Year 2014!! Secondly... thanks for the reply! 

And yes, alpha can be a floating point and it would be better if it is a floating point so have it more precise; about the True constants... that was an error I forgot to modify, the three cases should be working with the zero crossing since each case is each phase line (0° phase, 120° phase, -120° or 240° phase) so each time each line crosses zero, the case enters in true the pulse is shot in the obtained alpha firing angle (given in miliseconds from 0 to 8.33 which is one semicicle of a 60 Hz sinusoidal waveform of the three phase source) the hardware is set as an AC/AC converter with a TRIAC in each line to cut the signal, depending on the rectified DC voltage required at the end of the circuit it is the setpoint used on the PID to indicate the DC voltage that the user wants as output, depending of that setpoint the PID modifies the alpha firing angle until it reaches the closest value to the setpoint. 

How do I initialize module6?? I don't seem to find a start or stop function for the NI 9215 on the FPGA or project, only for the NI 9227

Also I was wondering, since I execute this FPGA on a RT host on the computer, does changing the setpoint directly in the computer (the host vi) creates a delay over my program? would it run faster if instead of changing it directly in the computer I use a potentiometer as a knob then the NI9215 to read the potentiometer value and then use that value to set my setpoint? I want the program to execute as fast as the zero crossing is detected, right now the program starts working like 2-4 ms after the zero crosseing, for example, in the moment my program detects a zero crossing, it takes from 2-4 ms to send an output pulse plus the firing angle delay (if I want it to fire at 1ms, then it detects zero and after 3 ms it waits for that 1ms to fire so it really fires at 4ms of the semicycle and not at 1ms of the semicycle). I am also comunicating the FPGA vi with the host vi because in my ecuation to get the firing angle I need an inverse cosine, but I cannot do inverse functions on FPGA, does that also gives me more delay on the execution of my program?

I didn't understad the timed loop part for deleting the inner while loop, I started at first with timed loops instead of while loops but there was a function I couldn't use inside the timed loops. 

PD: sorry for the late reply, I was a bit sick these days

[OmarIsi]

Hi Lagunasol,

Effectively if you have communication between host PC and the FPGA in the target you will have some delays, I recommend you to have a simple interface in the host just for changing values and all the operations must be in the target, in the chasis you have operations like ArcCosene. I share with you an example on how you can communicate Host and target through network variables.

https://decibel.ni.com/content/docs/DOC-9302

I’m checking your program and I made some changes. I’m sending you the modified version, hope you can check it and verify this is the behavior you are expecting. The sequence is like this:

1.-Wait for the Zero Crossing. If you don’t have Zero Crossing nothing change and check again. If we have a Zero crossing, the program going into the True Case.

2.-In the true case I’m checking the value of Alpha and change into a time value, Also I’m checking the time when the Zero crossing happens.

3.-In the While loop I’m checking the time elapsed since the crossing happened, when this time I equal or grater than the time given by alpha, I send the value in the Square wave out 2 to the Mod4/AO0 and finish the while loop.

4.-Then the program get back to check another Zero Crossing…

As I mentioned is recommendable to have the operations in the target, even I included a VI in the chassis as an example.

Hope this information helps you.

Regards!

[lagunasol]

Sorry the file attached is a later version of the Labview. I have 2011, can you send me again the file for a Labview 2011 version? 

[OmarIsi]

Hi lagunasol,

Here is the 2011 version.

Regards!

[lagunasol]

Hi! Thanks it seems that it has significatly reduced the delay time I was having!!

Now, I am not sure if it is needed to open a new post or is it ok here, I want to know if there is a way to get a more exact zero crossing, I am not sure if the best solution is to just make some filter or if there is a way for labview to aquire a better zero crossing (when signal is close to zero, it has many crosses due to high frequency noise, it is a three phase signal provided by the local electrical energy provider CFE )

And... would you suggest that instead of analog Output, I use digital outputs? are they faster and better for this application? Output signals goes to a MOC3011

Thanks!!

[OmarIsi]

Hi lagunasol, good news!

I can say th Zero Crossing VI is doing its job, so we can still using this VI in the project. I think we need a filtering Stage before analisys to eliminate this noise, you can implement a physical or programatic filter. You can use the filter desing toolkit or you can design a filter by yourself. Can check some examples in ni.com if you need.

About your Optoisolators, you can use a digital signal for this, is faster and more stable. Digital signal don need an ADC, this is the reason on the advantages. 

Hope this informations helps you!

Regards,

[OmarIsi]

Hi Lagunasol,

I recommend you to have the math operations in the NI 9074 CRio, and send the result to the FPGA. Ethernet communication is a non deterministic communication, so you will have delays in the communication. If you do the operations in the CRio you will have a better response. 

You can find examples in Example Finder from LabVIEW. Hardware Input and Output>>CompactRIO>>FPGA Fundamentals.

Regards,

[lagunasol]

Hi I have been looking at the examples but they are kinda basic, I was still wondering how to have comunication between FPGA VI/RT VI and host VI. I have a slight idea of using FIFO to comunicate FPGA with a vi in the RT, and RT vi can communication with global Variables, and in the host I can use the FPGA interface, but how can I also start other VI such as RT vi? I mean, I start my program in my host, I run the fpga and then... the SubVI that communicates with the FPGA should be also in the code to be used?

I believe my cRIO fastest speed is of 1ms, wont that create me delays in the execution? Sorry if I sound a bit confused about execution times and the order the VI are initialized and executed. Also, is there any limit for the amount of subVI I can have/run in my project? Or is cRIO powerfull enough to run many programs and an FPGA and graphics all in the same execution?