DeltaSigma module - External SampleClock TimeBase on FPGA (NI 9234)

[Cefa]

Hi,

Im looking for way to force DeltaSigma module use external Master Timebase on FPGA (cRio NI 9030). I have DeltaSigma  NI 9234 module and want to use external 12.8 MHz GPS frequency standard signal as master timebase for this module. For sure it is going to change resulting sampling rates from those given by internal master time base of 13,1 Mhz ( 50k instead 51,2k and so on but this is not an issue) .

I can do this easily on cDAQ chassis with DAQmx timing property node:

My question is how can i do it on FPGA with same module and cRIO 9030? I found only way to share internal master timebase of another delta sigma module under module properties menu, but cant find any way to route an external signal from outside like GPS standard. Is this option No-Go on FPGA and only way is to use cDAQ? Or is there some way to use digital input module (fast enough) and route external signal to Delta Sigma module timebase?

Thank you in advance for any idea.

F.