Detecting rising edge of sync signal on NI 9205

[elliot.ee]

Hi everyone,

I am acquiring a sync signal on the NI 9205 C series module on a CompactRio. The sync signal is a 375 mV square wave. The width is 15 ms. The sync signal is a 10 Hz signal.

The only difficulty is that the pulse signals are very noisy as seen in the attached images (twopulses.PNG zoomedinpulse.PNG). This is done with 100 us sampling time. I have attached a simplified image of the vi that I have so far which does a simple sampling of the signal (image.PNG).

How do you use Labview FPGA to detect the rising edge of the signal and to count the number of pulses?

[Stephanie B]

Hi Elliot,

I recommend taking a look at the Triggered_SW Gated Software - cRIO in the Example Finder under Toolkits and Modules >> FPGA >> CompactRIO >> FPGA Fundamentals >> Triggers and Watchdog. The description says "This VI samples an input when a rising edge is detected on the trigger line." Let me know if you have any further questions. Thanks!

Stephanie

[BillMe]

Here's how I did it for a motor tachometer using the PXI-7831R FPGA (see attachment).