Digital laser locking with Labview FPGA?

[eLions]

Hi, 

Sorry to bother if you are not interested in this digital signal processing question. We are looking a potential digital solutions to our close loop laser cavity frequency locking problem (see attached PDF file for details).  The goal is to flatten the transfer function of PZTs (cancel out resonances and anti-resonances and their corresponding phase shift) in frequency domain, besides normal PID control.  Input/output voltage signals required are small (we have our own high power amplifiers for the PZTs), and their frequency bandwidth need to be at least 50kHz (100kHz would be optimal).   

Among various NI hardware/software (DSP, FPGA, cRIO etc), would anyone recommend a cost-effective solution for rapid prototyping?   

Thanks!

[srm@viewpointusa.com · Accepted solution]

I would look at the NI 7854r PXI FPGA boards.  750 kHz AI rate, 1 MHz AO.  depending on the processing involved you could expect between 200 and 750 kHz closed loop control.  if the processing is very intensive, it will likely be something less than 200 kHz.

With that said, achiving these levels of performance is not trivial and a lot of care and attention to detail must be used in coding the FPGA.

good luck

[eLions]

Thanks, Stu. I will look into it and check the details.  The programming should include a PID and a few resonance filters and phase shifters.  Would you recommend an example? 

[srm@viewpointusa.com]

The examples are a good place to start but we have coded our own routines to maximize performance and resolution.

BTW, just because the routines run that fast does not mean that they will be able to control to the 100 kHz bandwidth you call out.  it will depend on the net phase delay of the control and feedback system.

[eLions]

That is right. Right now we have an analog servo which is marginally working, due to the resonances/antiresonances and their associated phase shifts, we could not optimize the gain profile to an reasonable level (now the unity gain point is very low). We believe with the help of digital processing, it should improve the servo at least up to 50kHz. 

[Seiji_ANU]

A colleague of mine at the Australian National University, Ben Sparkes, has developed a robust digital locking system using FPGA 7852 cards. The paper is available here: http://rsi.aip.org/resource/1/rsinak/v82/i7/p075113_s1

and you can download the code from the ANU Quantum Optics website: http://photonics.anu.edu.au/qoptics/Research/digitallocking.php

I've been modifying the code for my own setup for a few months now, and have to say that for the most part it behaves very well.

Seiji

[eLions]

Thank you very much Seiji_ANU, this is very intertesing and does the job. We will go through details, reading the paper...., will come back with questions ^_^.  

[eLions]

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