Does the FPGA Look-Up Table 1D function use FPGA RAM?

[mysterj]

I am developing a FPGA VI that uses both a 1D Look-Up Table and the FPGA Memory Read & Write functions.  The Help section on the LUT function has left me wondering if both of these functions use the 8K x 16 RAM onboard the FPGA.  If so, then there is the potential for a memory mapping conflict.  Can anyone enlighten me on where the LUT function actually stores its data?  If it does store it in the 8K RAM, then how do I find out which addresses it is using?

- Keith

[DimensionFinder]

Hi Keith; I believe that the memory mapping is all taken care of by LabVIEW behind the scenes. When you use Memory Read/Write VIs it alots 16 KB in RAM for those operations and accesses only that 16 KB. I would be interested in knowing why you plan to use both though. Look up tables give you access to the entire 80 KB whiel Memory Read/Write without the Memory extension utility only provide access to 16 KB. I will find out more about how this works though as I am curious too. I do know that from a user's perspective this is not something to be concerned about. Best Regards, Jaideep

[mysterj]

Thanks for the info. 

I'm planning on using the LUT's to store static look-up tables and the Memory Read/Writes to store and retrieve dynamic data.

[DimensionFinder]

Hi there:

You should have no problem using both. Basically all the addressing is handled in the background by LabVIEW. The Memory Read/Write VIs use 16KB while the rest of the 64KB can be used by the LUTs.