Exploiting L2 cache shared by cores, anyone explore this yet?

[Ben]

Some, not all, multi-core processors have a shared L2 cache. In theory a Master and a slave process could be deployed, one in each core (using the Timed Sequence to control which core they run in).

Provided the code they BOTH run is tight enough that the code used by these two processes can be run using cache hits only, a queue interconnecting them could run at near CPU clock speed and not have to slow down to memory bus speed.

So have any of you tried this out?

Just sharing another crazy idea.

Ben

[Ben]

So why would Ben be interested in doing this besides the possible performance gains?

When the first Star Wars movie was made the leap to light speed scene was a computer generated sequence that took a VAX 11/784 a couple of days to complete. The VAX 11/784 was actually (4) VAX 11-780's with shared memory. Well VAX's ran VMS who's designer also developed a secret new application for the future that was called Cystal based on his work develping VMS. Eventually the VAX architecture got some tweaks and put on a chip in the form of a Pentium. That secret new OS got a name based on incrementing the numeric values of VMS to become WNT.

So with the enhancements that let us ID the computer resources and control what code gets run where... we can finally duplicate on a laptop what previously required a freight train to deliver.

Ben

BTW: Somewhere in my museum I have the System manual for the first VAX every deployed to the field. It was originally installed in the computer center for CMU, one of the first computer on what would eventually become the Internet.