FATAL_ERROR during compiling fpga progrqams

[XT_Testlogic]

I am a quite new LV programmer. This is actually my second LV Real-Time/FPGA project.

The project uses a NI cRIO 9012 with 8 plug-in modules attached. They are NI 9205, NI 9205, NI 9411, NI 9219, NI 9211,  NI 9211,  NI 9211,  NI 9211. The two 9205s are configured to use tow ends differential inputs. For the maximum flexibility, the FPGA is programed to scan all the

In compiling my FPGA codings, I've encountered the error message that states the FPGA program exceeds the resource limit. And I then adjusted the coding and reduced some of the variables size. I then encountered another FATAL_ERROR message during the compilation...

The FPGA coding were mostly copied from different NI-Sample help files and were individully tested on the target FPGA with no problems. 

Now, I don't know if the error is related to my coding or I was just limited by the cRIO 9012's size. Some one please help. Many thanks.

Tian

Message Edited by XT_Testlogic on 11-13-2007 11:05 AM

Message Edited by XT_Testlogic on 11-13-2007 11:07 AM

[griffindore]

Hi Tian,

I used Diagram Disable Structures to find the part of your code causing this compilation error. It is shown below.

After a lot of testing, I removed the SubVIs and put the code from those SubVIs directly on the top-level FPGA VI, replaced the controls and indicators within that section with new controls and indicators, and created a new while loop with timing to correct this error. The resulting VI is attached.

The VI still results in a mapping error since the code takes up too much space on the FPGA. Try using single-cycle timed loops where possible, make the controls and indicators as small in size as possible, and decrease the amount of I/O as much as possible.

I will be posting more relevant information to the cause of the compile error you experienced after some more testing.

Message Edited by lion-o on 11-18-2007 03:06 PM

[griffindore]

This was reported to R&D (# 4DADERGB) for further investigation. R&D is currently investigating this issue. I added my investigation notes on this issue as well. Thanks and we appreciate your feedback!