I am working on developing software for a fiber optic system where the frequency generator/arbitrary waveform generator provides a bit signal that is then sent over fiber as a PSK signal to a digitizer (with some intermediate steps). The FGen is going to be a PXIe-5745 and the digitizer PXIe-5774. I am going to do data manipulation on the FPGAs so I am doing the retrieval of the data from the digitizer on the FPGA.
I am looking for ideas on how to make sure that the sequence that the FGen outputs can be matched up with the corresponding part of the retrieved data stream when the return data stream is a different signal type (PSK vs square wave or software modulated PSK). The way that the system is designed there will be disruptions of the data stream so that the PSK signals will not completely match even if the start is synchronized. In order for the math to work properly, I need to get the start of the FGen output to match with the start of the digitizer signal with nanosecond precision. Can I shift when the data is being measured to get the data synced?
Things I have already considered:
- Shifting where I start the decimation on the 16 samples that are stored in the digitzer's buffer every clock cycle, but this only shifts by at most about 1 ns and must be done continually. I plan to decimate to 4 samples and then average them for a 200 MHz sample rate.
- Read and discard the first sample in the digitizer's buffer and then read either the remainder or a full 16 samples if I can wait for another sample to come in. This sequentially shifts by about .3 ns. I do not know if this would work as I do not understand how the digitizer sample buffer works (or IO socket).
- Align in post processing. This may be where we start, but we were hoping to do most of the processing on the FPGAs to get a delay of at most a couple of seconds.
My initial hope was to be able to have a display on the host VI that the user could look at and click a button to shift the digitizer signal a little forward or back to get the data aligned.
A zip of the project is attached. There are some extra VIs included that are not currently used (test..., op2). In the Digitizer code the op3 is the most recent version. I have not cleaned up the host VI front panel as I have been working on the backend.
