FIFO Host vi can't run

[soljiang]

I've been trying FIFO example at http://zone.ni.com/devzone/cda/tut/p/id/4534 and built a very simple FIFO vi.  However, every time after I save everything after the application runs smoothly, when I open the project, host vi and fpga vi, the host vi can't be run.  However, if I open a new blank vi and do copy and paste of everything in the original host vi, the new vi program will be able to run again.  I'm confused what's wrong with the host vi.  I attached both the fpga and host vi below and I also attached some screensnaps of the error list.  Basically it says that almost nothing is supported by the current target. 

Another question is that the time out parameter in FPGA vi has the unit "clock tick".  What exactly is clock tick and what is it in seconds?  

Are there any particular books published by NI that have a somewhat comprehensive instruction on FPGA programming that you can recommend?  We are using PCI-7833R in particular. 

Thank you very much in advance.   I appreciate your help. 

[Christian Mergl]

I would highly recommend you to join a LV FPGA Class.

However, if you go to ni.com and search for "FPGA Programming Tutorial" you will find some, e.g. http://zone.ni.com/devzone/cda/tut/p/id/3358

[soljiang]

Thank you.  But could you please suggest any potential reasons that cause the error that I get?  I'm just confused why simple copy and paste can fix the problem while it happens repetitively for every host vi that I have saved after I restart Labview program.  Thanks a lot.

[JaredW · Accepted solution]

You should attach your LV Project with the rest of the your files as well. I think the problem is that your Host VI is under your FPGA target in the LabVIEW project which is not the correct context for the host VI. The Host VI should always be under the My Computer item, not the FPGA Target item.

The reason I think this is your problem is that when I looked at your error 4 picture, it shows your host VI being in the FPGA Target context. You can know this by looking at the window title of the VI, you will see "on Analog Input 2-R Series.lvproj/FPGA Target". I would expect to see "on Analog Input 2-R Series.lvproj/My Computer".

In summary, try moving your host VI out from under your FPGA Target and directly under the My Computer item.

[soljiang]

Thank you so much!  It solves the problem!  I was aware of this problem before and I usually have my host vi under My Computer.  But I had some problem with Timeout and I read from another thread that moving host vi into target would solve the problem.  Now both problems have been solved.  Thank you so much, JaredW and Christian_M.  I appreciate your help.