FIR filter in FPGA (deprecated IP builder)

[akarpilow]

Hello! I am working on implementing an FIR filter on the FPGA of a cRIO (9068). I came across the IP builder and documentation mentioning generation of FPGA code for a filter. However it looks like this function is no longer available for LabVIEW 2020 and on. In the latest version (2021) of the Digital Filter Design Toolkit, the readme file doesn't even mention FPGA code (unlike all the previous versions of this toolkit). What is the recommended alternative way to efficiently implement an FIR filter (given coefficients designed separately, so not a standard butterworth filter or something)? Why was this software discontinued? It seems like it would be really useful. Now many of the FIR filter guides are now outdated since they discuss FPGA code generation.

Thanks for your help!

[Terry_ALE]

See https://www.ni.com/en-us/support/documentation/supplemental/11/an-introduction-to-high-throughput-ds... 

It has info on FIR filters in LabVIEW FPGA using the Xilinx IP. This is how FIR in LabVIEW FPGA is typically done.

Can you provide sources indicating FPGA code generation from the digital filter design toolkit?

[akarpilow]

Thank you! It looks like it needs to be mostly coded manually or using the Xilinx CORE Generator IP. I'll look into that!

The readme for Digital Filter Design Toolkit for LV 2020 does mention generation of FIR code for FPGA but I've just confirmed with the tech support that this function is no longer available for LV 2021. They're looking into why it was removed. https://www.ni.com/pdf/manuals/375119g.html 

Thanks for your help! 

[Terry_ALE]

Thanks for the post.  Never used it to generate LabVIEW FPGA code.  I have used it to generate FIR filter coefficients that are used by the Xilinx FIR IP.