FPGA Analog Voltage Dip

[otheredward]

Hello,

I'm using an NI FPGA 7852R PCIe card to control a few devices. For one device I need the FPGA card to output an analog voltage and do nothing else. So the FPGA program starts, sets the analog volage and stops later when the host program tells it to stop. The only problem is each time the FPGA program starts or stops the analog voltage drops from what ever value its sitting at to zero, and then jumps back up to the original voltage. Is there a way to start and stop an FPGA program without having the voltage dip each time it starts and stops?

I've included a screen shot of my o-scope reading the voltage. You can see that when I program starts the voltage drops to zero for about 150ms.

Thanks,

Ed

[DylanC]

Hi edward_01,

In your host VI, are you closing and resetting upon calling Close FPGA VI Reference? (Right Click) If so, you may want to have you FPGA code in a state machine of sorts (have it go into an "idle" state before you stop your Host VI) so you never have to reset it. You can then just close the reference so it is not resetting the FPGA VI. 

DylanC