FPGA Analog input example loop timer

[soljiang]

Hi, I've got a question about sample rate using FPGA and interfacing with Host vi.  

In the manual I attached here, as well as the Analog input example, what does the loop rate in the vi specify?  When I'd like the sample rate to be 1KHz, as I tried, it does not actually sample the analog signal at 1KHz.  The data I get and write into my text file shows that the sample rate is much slower, slower than 100Hz.  How can I get a 1KHz sample rate?  Thank you very much.  I appreciate your help.  

Best,

Charles

[soljiang]

Hi, I attached the Host vi I'm using here.  The FPGA vi is the same as that in the example.

[GregFreeman]

The FPGA code would be more helpful than the host. Both would be the best. Also, have a look at the sample rate to loop time VI under the FPGA Interface -> Scaling menu. This will save you having to manually calculate it and you will avoid any errors there. Then make sure your wait function isn't configured for ms or something by either double clicking on it or hovering over it with the context help showing (ctrl + h) which should tell you the input type. Those are my guesses so far.

Edit: I really should have looked at your code closer. You aren't using a FIFO but are reading a control value. You can only read a control as fast as your RT loop is spinning. This completely defeats the purpose of FPGA. You need to use a FIFO to pass the data. That's your problem.

[GregFreeman]

See my example and the discussion here. My final guess is your IRQ isn't being asserted at the right times so you sit there waiting.