Hello,
Another day, another FPGA question...
I'm overmapping on my compilation and trying to reduce lookup table (LUT) usage, since that's the problematic area. Removing some front panel arrays seems like a good way to do this.
Here's the scenario: I have two loops acquiring analog inputs. One loop has a lot of calculations and is substantially slower than the other. The other, faster loop, is also aquiring, and sending data off to the host via a DMA FIFO. The slower loop was using a front panel array to transfer data because I'm using all three DMA channels already, and I'm trying to eliminate that array.
So... it would be really nice to read the data from the slower loop and append it to the data from the faster loop, sending both sets of data through the same DMA FIFO. I'm thinking that I can use a "memory item" to do this, having the slow loop write to the memory, and having the fast loop read from it.
Two questions: Is this solution feasible, and will it reduce my LUT usage?
Thanks,
Jim