FPGA Module vs. HDL node

[Oli_Wachno]

Hi there,

I'm trying to use an HDL node to integrate some VHDL code into my application. As I still don't know the actual clock speed I'm going to use, I need to integrate different code parts. I know, that I can achieve this using the ClockFrequency Generic and the generate statement. So far, it all seems to work. Problems occur, when I'm changing the clock frequency in the Embedded Project Manager: switching from 40MHz to 80 MHz, the generic in the property window of the HDL node still keeps it's 40MHz value... already tried saving/closing/reopening the project without effects....

Thanks for your help

Regards

Oli

[jdigiova]

You will see

 generic(
      ClockFrequency : Integer := 40000000
   );

in the Code tab of the HDL node.  This line will not change even when changing the compile rate because this is defining the generic and assigning a DEFAULT value.  When the code actually gets compiled the clock frequency is assigned a new value depending on your compile rate.  So in the implementation when you read the ClockFrequency the actual compile rate will return.

Regards,

JD