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FPGA PLL implementation

Hello all,

 

I am working with FPGA PLL express VI (http://zone.ni.com/reference/en-XX/help/371599P-01/lvfpga/fpga_3phase_pll/#details) to calculate a three phase voltage systems frequency and phase.

 

In block diagram outputs phase output is in radians, however when configuring data type only word length is configurable. Integer word length is always 1 making this output range from -1 to 1. Is not this configuration contradictory, since phase output should be between -pi to pi or 0 to 2*pi?

 

Greetings!

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