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FPGA PXI-7954R with PXI-6581 adapter module - missed 1 cycle of acquisition

Hi,

 

I try to generate a simple pattern and strobe it back on the same card.

 

There are 2 transmitting signal : TxClk (1.02MHz), Tx

2 receiving signal: RxClk(1.02MHz), Rx

 

TxClk and RxClk are connected together. Rx and Tx as well.

 

The acquisition was missed by 1 cycle at the middle. Please refer to the picture attached.

 

I have included the source code too. Your help are much appreciated. Any comment are welcomes.   🙂

 

Acquisition.PNG

 

GenAcq.PNG

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Hello Eng Wei,

How repeatable the missing cycle that you got?

 

Meadow.

- Meadow -
LabVIEW 7.0 - 2011, Vision, RT, FPGA
TestStand 3.0 - 4.5
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Hi James,

 

There were some mistake on the cycle counts. Thanks for your advise. 

 

 

BR,

engwei

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