FPGA Read/Write Control Function Issues

[HySoR]

Hello all!  Rather new to using FPGA, but I have an interesting issue that's popping up.

Currently pulling in RAW voltage data from a set of sensors (Pressure Transducers, Load Cells, etc) through a cRIO DAQ.  Have the FPGA file setup to pull in that data already and have the main VI and all the sub-VIs working just fine.

What I'm trying to do is save the raw voltage data (TDMS files) on the lower level and the convert and display on the upper level so that I don't have to convert and save (speed up saving data).  So that leaves 3 distinct "levels/sections":

1. On FPGA that pulls in the raw data
2. On FPGA that saves the raw data
3. Main VI that does all the controls/conversions/displays etc.

Number two is where I'm having an issue.  I want to save all the data in parallel so I'm creating a save FPGA for the I/O devices (8 Relays to command solenoid valves, 3 Pressure Transducers, 1 Load Cell, 4 Thermocouples).

The issue I'm having is when I use the FPGA Read/Write control to read in from the Target and save to the TDMS.  When I only use a single FPGA target reference the lines are broken, but as soon as I switch to two targets, it now works.

I've attached a screen cap of the current problem.  The set-up on the bottom (with only one target) doesn't work.  But the second I add more than one target, it works.

Any reason why it might be doing this?  Any ideas/suggestions at all on how to go about setting this up in general?

Thanks!

[HySoR]

Hello all!  Rather new to using FPGA, but I have an interesting issue that's popping up.

Currently pulling in RAW voltage data from a set of sensors (Pressure Transducers, Load Cells, etc) through a cRIO DAQ.  Have the FPGA file setup to pull in that data already and have the main VI and all the sub-VIs working just fine.

What I'm trying to do is save the raw voltage data (TDMS files) on the lower level and the convert and display on the upper level so that I don't have to convert and save (speed up saving data).  So that leaves 3 distinct "levels/sections":

1. On FPGA that pulls in the raw data
2. On FPGA that saves the raw data
3. Main VI that does all the controls/conversions/displays etc.

Number two is where I'm having an issue.  I want to save all the data in parallel so I'm creating a save FPGA for the I/O devices (8 Relays to command solenoid valves, 3 Pressure Transducers, 1 Load Cell, 4 Thermocouples).

The issue I'm having is when I use the FPGA Read/Write control to read in from the Target and save to the TDMS.  When I only use a single FPGA target reference the lines are broken, but as soon as I switch to two targets, it now works.

I've attached a screen cap of the current problem.  The set-up on the bottom (with only one target) doesn't work.  But the second I add more than one target, it works.

Any reason why it might be doing this?  Any ideas/suggestions at all on how to go about setting this up in general?

Thanks!

[Bo_Xie]

HySoR,

You might check the documentation for "data" terminal of "TDMS Write" (http://zone.ni.com/reference/en-XX/help/371361H-01/glang/tdms_file_write/). One DBL element is not accepted, but 1D DBL array is accepted.

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data is the data to write to the.tdmsfile. This input accepts the following data types:

• Analog waveform or a 1D array of analog waveforms
• Digital waveform
• Digital table
• Dynamic data
• 1D or 2D array of:
  • Signed or unsigned integers
  • Floating-point numbers
  • Timestamps
  • Booleans
  • Alphanumeric strings that do not contain null characters

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