FPGA VI modified after each opening

[Vladimir_Drzik]

Hi Yi

Thanks for your support. I'm actually quite surprised that you are not able to reproduce the problem, because we are experiencing it on all our four machines. Just to make sure we understand each other, the project file is modified after opening of the included VI, not after opening of the project itself.
The project is very simple, it's just a newly created one with one included VI, nothing more. What is being modified is just the project file itself. The special thing about the machines where it's happening is that there is no actual FPGA hardware installed. The FPGA target is IMAQIO-5, which is for PCI-8254R or similar cards. I've also did a quick research for what is actually causing the problem and it seems like the culprit is the VI-scoped memory or VI-scoped FIFO. If there is no such thing included in the opened VI, the project file does not change.
I'm also attaching a report from MAX so that you can have a look at my software configuration. The SW configuration on the other machines is more or less the same.

Vladimir

[GiGe]

Hi Vladimir,

When you did the mass compile did you do it on the VI or the project?  If you only did it on the VI then you may want to try doing it on the project.  Make sure that you have the project inside of a folder and then mass compile the folder.  Let me know if that corrects the problem.

have a great day,
GG