FPGA and Digital I/O Modules

[drycsr]

Hi all,

We have NI 9421 Digital Input and NI 9472 Digital Output Modules. We can run these modules in a VI under the cRIO 9073 chassis. While we added FPGA target under the same chassis, we can not use the modules. We also install Scan Engine.

How can we use FPGA and I/O Modules at the same time?

[nathand]

Does this document answer your question?

EDIT: link is to Using Scan Engine and FPGA Simultaneously on a CompactRIO

[drycsr]

We also checked this document. Our project included FPGA target. I/O modules were added later.

[Ben_J1]

Drycsr,

   It is possible to use some C-series modules in FPGA and others in Real-time using Hybrid Mode though it is not possible to use the same module in both in the same project. This causes issues when two systems try to use the same resource. One possible solution is to use the FPGA VI to access the I/O and use the FPGA Interface to get the data to Real-time. Hopefully this guides you in the right direction.

Regards from Austin,

[drycsr]

Hi Ben,

Thanks for the reply..

 Actually i dont want to use the same module in both in the same project. I want to use my modules (in attachment, mod3) in a VI which is under the cRIO chassis, not FPGA target..

But when i add the FPGA target under the cRIO chassis, modules (which are under the cRIO chassis) are not working...

I wonder, Should I use the modules under the FPGA target? If I use it in this way, your suggestions are very helpfull..

[Ben_J1]

Drycsr,

   Try dragging the modules from under the FPGA target to the cRIO. This will change them from FPGA mode to Scan Engine mode.

Regards from Austin,

[Donovan_B · Accepted solution]

Once you add an FPGA target under the CompactRIO chassis, when you deploy the code, the cRIO is configured for FPGA mode, which requires a compiled bitfile to communicate with the C Series modules.  Removing the FPGA target or changing the chassis mode in the project and redeploying should reconfigure the cRIO for Scan Mode, which allows you to use the module IO directly from the RT VI.

For more information, see this post. 

[drycsr]

Thank you Donavan and Ben, it was very helpfull and solved the problem.

[JoJa]

Hi Ben, I am working with labview 8.5 version but I don' have Digital I/O packet (example: read Digital I/O or write to Digital I/O)...How can I get it!

Regards,

[Ben_J1]

Joja,

  I would recommend starting a new thread for this as I am not sure its as related as to demand staying on this thread. Off hand I am not sure what you are referring to when you Digital I/O packet? Are you referring to Scan Engine abilites (adding a module under the cRIO and not the FPGA)? Are you referring to not having the ability to read and write to a digital pin or port on the FPGA level? 

  Either way a new thread would be the best way to get the most attention for this question and, as always, the more in depth the question, the better. 

  Hope this helps send you in the right direction!

Regards from Austin,