FPGA and Realtime sampling rate synchronization

[hsw9797]

I'm doing signal processing using FPGA and Host 

Problem is Target sampling rate and Host sampling rate is different. that is big problem

i know microproccesor have function that synchronizing sampling rate between target and host.

i think same function may be exist in Labview

Could i ask some Ex(Labview 2017)

Ex. Target sampling rate is 5000Hz

      Host sampling rate is 5200Hz 

matching two sampling rate by hand is not good method. becuase there is jitter in RT and Limitation 

[Bob_Schor]

What do you mean by "Host"?  Where is the FPGA located?

I happen to be working on a LabVIEW Real-Time Project that has the PC (running LabVIEW 2019, 32-bit) as the "Host", a RIO (running NI Linux Real-Time) as the "Target", and an  FPGA (inside the RIO) acting as an FPGA.

Generally, one wants to use RT Targets as the devices to do sampling, as they have really accurate clocks and much less worry about "interrupts" and "multi-processing" than the PC.  In some cases, one can write FPGA code to run on the Target to do the DAQ functions for you, and let the FPGA do the synchronization, as well (this is basically what we are doing).

Why don't you describe your system, the hardware, the type(s) of sampling you are doing, and why you are apparently "choosing" to sample (and just what are you sampling?  Analog?  Digital?  Something else?) at two different rates.

Bob Schor

[sakiyo19]

ホストの仕事は何ですか？ 久しぶりにこのサイトにアクセスして、今まで聞いたことのない言葉が出てきました。 私がよく知っているFPGAですが。 FPGA、つまりフィールドプログラマブルゲートアレイは、プログラマブルインターコネクトを使用してリンクされるCustomizableLogicBlock（CLB;カスタマイズ可能論理ブロック）のマトリクスを含む半導体デバイスです。 生産後、FPGAは、特定のアプリケーションまたは一連の機能の特定のニーズを満たすように再プログラムすることができる。