FPGA compilation weird results for sbrio

[kdevelle]

Hello
I am evaluating the possibility to move an existing fpga code from a crio to a sbrio.
I did the modification to adapt input to what I have available on my sbrio and I obtained this compilation results.
I have never seen a compilation sucessfull with 129% slice used.
Do you think I can trust this result? I don't an sbrio to run the code at the moment