FPGA invoke method execution cycles

[Drew.Rankin]

I was wondering just how many clock cycles the invoke method uses. I was attempting to compile my code with the method inside a single cycle loop and got denied.

Please, post a linky to the resources with timing info for FPGA functions as well.

Thanks!!

Drew 

[Burt_S]

Hello Drew,

Which FPGA invoke method are you using?  Timing for these methods may not be available because the timing may depend on the target.   In general, you can benchmark the timing of any VI using a tick count VI and a shift register.  Also, timing information for most FPGA VIs can be found in the detailed help for that VI.

[Drew.Rankin]

I am using the Check Status and Set Line Direction methods for DIO modules. I think the compile stopped at Check Status.

Drew

[BillMe]

Which FPGA are you using?

[Drew.Rankin]

2M Gate in the NI9073