FlexRIO Streaming IDL

[Terry_ALE]

The FlexRIO Streaming Instrument Design Library http://zone.ni.com/reference/en-XX/help/372614J-01/TOC10.htm seems very useful.  Are there examples or guides for how the FPGA and Host code interact?  Is it based on the names given to the indicators/controls on the FPGA?  What is stream 0, 1, or 2 on the Host?

[UMASO · Accepted solution]

Hello Terry, I strongly agree that Streaming IDL is very useful.  

Yes, it is based on control/indicator names on FPGA VI.  If you refer to a typedef which is located at C:\Program Files (x86)\National Instruments\LabVIEW 2015\instr.lib\_niInstr\Streaming\v1\Host\Public\Stream Host Interface.ctl, it contains all the expected names of control/indicator related to Streamind IDL.  Based on the typedef, it looks like the number of parallel streams on FPGA can be up to 16.  

As for examples or guides, only FlexRIO help and some examples are available.  

Osamu Fujioka
TRIONIX Inc.

CLED/CLA
LabVIEW FPGA and Software Designed Instrument Expert

[Terry_ALE]

Thanks.

I hope NI generates a tutorial such as the one for the Instruction Framework as shown here:

https://forums.ni.com/t5/NI-Labs-Toolkits/Instruction-Framework-Tutorial/ta-p/3533500

[UMASO]

Hello Terry, 

I strongly agree.  IDL helps users to tremendously accelerate the FPGA implementation.  The obstacle is that we are short in learning resources about how to use each IDLs.  Hope NI will provide more learning resources and lower the barrier to LV FPGA and IDL, so that more users can rely on those fantastic reusable components. 

Osamu