Greetings, all!
I am maintaining and extending a working app on a cRIO 9067 in LabVIEW 14.1. The FPGA runs our LabVIEW code.
Our FPGA code generates a digital pulse train using a 9401 DIO module, in a high-speed clocked loop.
Recently, we've seen bogus pulse behavior from a couple of our instruments, so I thought it would be useful to retrieve the error code from the DIO write operation inside the loop. The FPGA pulse generation clocked loop stops and restarts every so often, so I tried adding an extra write operation before the loop begins. This caused a compilation error because the module was used in different clock domains.
Next, I tried adding the error terminals to the central DIO write operation, and connected the error output to a last-value tunnel of the loop. This broke the loop's timing constraints, by a lot.
Finally, I tried wiring the error through a feedback node; this reduced the timing breakage, but didn't eliminate it. It looked from the (somewhat cryptic) timing analysis that the remaining timing issue was between the feedback node and the output tunnel.
My objective is to get some sort of indication that the DIO module is functioning properly, and if not, what its problem is. Once a minute would be fine. Is there some way to query cRIO module status, other than attempting an I/O operation on one of its channels? Can you suggest a strategy for getting the error code without breaking the loop timing constraints?
Thanks, and stay well, everyone.
-- Mark
