Glitches in buffered writes ... ?

[Rudolf Potucek]

Hi Everyone!

I have a VI that will do buffered writes (configure card to continuously
write buffer and then put AO-Write into a loop writing new data) on 2
output channels.

I was kind of surprised that this approach will generate glitches in the
output data if I try to do more than 3 updates/s (i.e. scan rate >
3xbuffer size) no matter how large the buffer is. Now I tried adding a
read loop and when I activate that I get severe glitching on the output
channels. Does anyone have any idea why this happens and what I can do
about it?

Thanks,

Rudolf

[Raecine Meza]

Glitches are discussed in a KnowledgeBase Entry titled "PCI-MIO E Series Common Questions". Here is the explanation and additional information provided from that KB entry:

"I'm using the DACs to generate a waveform, but I discovered with a digital oscilloscope that there are glitches on the output signal. Is this normal?

When it switches from one voltage to another, any DAC produces glitches due to released charges. The largest glitches occur when the most significant bit (MSB) of the D/A code switches. You can build a lowpass deglitching filter to remove some of these glitches, depending on the frequency and nature of your output signal. The PCI-MIO-16E-1 board has built-in reglitchers, which can be software-enabled, on its analog output channels. See the Analog
Output Reglitch Selection section in Chapter 3 of the PCI E Series User Manual for more information about reglitching."

You can download user manuals at www.ni.com/manuals.

Raecine Meza
National Instruments
http://www.ni.com/ask