Hardware Timed Single Point Data Acq with PCI-6143

[Ryan_V[DE]]

Ryan,

I would imagine that a PXI controller would be marginally faster - a MXI connection should not add much overhead.

[RVallieu]

I have successfully been able to read the pulses from the FGen with this set-up.

My problem now is that when I start the read and have it wait for the FGen start (which I delay a few ms) and the FGen is started the DAQmx read sometimes misses the marker and doesn't read the first segment.

I am sending the 5412 FGen a Square Wave WDT segment 1 being high (1.0) and segment 2 being Low (0.0) - and this repeats on it's own until the FGen is stopped.

The DAQmx read does wait until it receives a marker pulse over the RTSI line - but I need to figure out why it is missing the first pulse on occassion.

Any ideas?

Thanks,
Ryan

[RVallieu]

http://forums.ni.com/ni/board/message?board.id=310&message.id=426

Well I found out why I was seemingly "missing" data.  The FGen is cycling itself - stopping Waveform Generation and restarting in a cyclic pattern.

I started another post for this in the Signal GEN forum - but wanted to direct viewers of this thread to that post.

[RVallieu]

Well that was not the problem - the FGen is putting out the signal correctly.

next Question - WHAT IS THE REQUIRED PULSE WIDTH for an external clock signal to the 6143 sample clock?

My 6143 is still missing a read here and there when the markers are routed to the RTSI and the RTSI is routed to the DAQ sample clock.

[Ryan_V[DE]]

Ryan,

The minimum pulse width for this clock is 10ns. What is the pulse width that you are supplying?

Thanks,

[RVallieu]

According to the manual that came with the PCI-5412 FGen the signal is ~150 ns wide.

Ryan

[Ryan_V[DE]]

Ryan,

If all you are missing is the first pulse, then it sounds like the analog acquisition is not starting before the first pulse is received. I would use the error cluser to ensure that the analog in task has completely started (wire the error out of this VI to the error in of the FGen Start VI). This should ensure that the ADC is waiting on the sample clock (marker pulses) before this clock actually commences.

Does this help?

[RVallieu]

The problem is that it is not just missing the first pulse - it is missing a random pulse here and there within the data set.

I start the Fgen before I start the DAQ task - and the DAQ task won't start until it receives a sample clock tick (theoretically anyway) so I am at a loss for the reason it would be missing the first pulse.  That being said - if it was just always the first pulse it missed I could easily correct that and just remove the low reading and do 1 extra reading to compensate. 

It's not consistent in missing the first pulse or the pulses in the "middle" of the read.  I'm reading 4800 samples per read.

[McKala[DE]]

Ryan,

For clarification, how many pulses are you expected and how many or often are you missing them? 

I also wondering if there something in your program that would cause an occasional loss.  Do you see the same behavior if you use the "Cont Acq&Chart Samples-Ext Clk" shipping example?

[RVallieu]

The signal pulse is at 48,000 Hz as we're sampling at 1 marker point on the high and 1 marker point on the low sections of a square wave at 24,000 Hz.

I'm reducing the data by subtracting the Voltage readings at the low from the high and then averaging  either 400 or 800 points for 1 "final" point to plot.

I'm missing usually the first data point, and a random point in the middle of one read - where the read is supposed to contain 4800 points.  The read of course always contains 4800 points, but instead of High-low, High-low, High-low - I will get High-low, High-low, High-High, High-low...etc.