High Through Put Example (LabView FPGA FlexRIO Memory)

[Edmund130]

I am trying to collect data from an ADC that samples at 2MHz, but the High Through Put Example in LabView FPGA FlexRIO runs at 125MHz and complains that I am not responding Quick enough at 63 Clock Cycles between ADC Sample rate.

[GerdW]

Hi Edmund,

and what is the question?

Mind to attach your code, with some more detailed information on your problem(s)?