How do I use AI triggers and counters in DAQ6020-E using LabVIEW 6.0

[Alan J. Wang]

Hi:
I am new to LabVIEW and sorry for newbie questions. My questions are:
1. I want to use the 2 counters in DAQ6020-E to generate 2 continuous pulse trains(C1 and C2) at different frequencies(C1 @ 1k Hz and C2 @ 2k Hz)and I want to synchronize these 2(for example,they both start with positive edges), how can I accomplish that? should I use a software trigger or a hardware pulse trigger?
2. Followed from 1),there will also be 4 analog inputs(a0,a1,a2,a3) in the same VI. I want them to be triggered by two non-overlapping clock sigals phiA and phiB. phiA and phiB are created by C1 and C2, they both will have 25% duty cycle(with 1k Hz frequency) and are out of phase by 180 degree(thus they wont be bo
th high at the same time).I want a0 triggered by the postive edge of phiA, wait for 0.1 ms, take 1 sample,stop and wait for the next postive edge of phiA. Similarly, a1 will be triggered by negative edge of phiA(wait .1 ms and then sample), a2 by positive edge of phiB, and a3 by negative edge of phiB.
I want to know what pins in the 68-pin connectors corresponding to counter0 and counter1 output, and where should I hook up the triggering phiA and phiB to. Should I initialize them first in Measurement & Automation Explorer?
Thanks so much.
Alan

[Bill B]

Hello Alan,

Thank you for contacting National Instruments.

Here are some answers to your questions:

1. You will want to use a harware pulse trigger. This pulse will be connected to the gate of both counters. When a rising edge is detected, both pulse trains will be output on the output pins of the counters. See example attached below.

2. It will not be possible for you to accomplish what you are asking with a DAQPad-6020E. E Series devices only have one analog-to-digital converter (ADC). This means that all 16 channels are multiplexed to a single ADC. This means that it will not be possible to sample(trigger) a0, a1, a2, and a3 simultaneously nor independently. Also, it is not possible to implement the 0.1ms delay from when the edg
e of the sample clock is detected. Here what you can accomplish:

1. You can use an external clock to sample(trigger)a single channel.
2. You can select if you would like the sample your signal on the rising or falling edge of your external clock(phiX).
3. You can use the output of one of the counters as your external sample clock.

I have attached two examples below. One of them generates a pulse train from counter 0. The other acquires analog data from channel 0 by using an external clock.

Here is a link to the DAQPad-6020E User Manual. The output pins for the counter can be found on pages 4-2 and 4-3: http://digital.ni.com/manuals.nsf/websearch/9B5442F668EB7C6B8625669F00743D24?OpenDocument&node=132100_US

Regards,
Bill B.
Applications Engineer
National Instruments