Hello all.
I would like to generate a sine wave of an arbitrary frequency to eventually output from the myRIO FPGA differential analog I/O. I have been able to do this from the Sine Wave Generator Express VI, but I would like to accomplish it from the High Throughput Sine vi instead.
My understanding is that I can use delay nodes to increment the phase of the sine wave to generate its values over a period (as shown in the picture below), but I am unsure about how to designate the frequency of this synthesized signal. How may I do this? Could I do it by choosing a specific time delay in ticks between each sample?

I have attached the project that I am attempting this on below. The code that I am currently working on is for the FPGA Target vi under the "DAC" virtual folder.
- Best regards, 2001J