How to compute 8 channels FFT on deltasigma FPGA ?

[IYED]

Hi gents,

I have an 9024 Crio, I need to acquire data at 51,2KHz with 2 slots NI 9234 (8 cahnnels) deltasigma and compute simultanous 8 channels FFT then send them to host. for the data I managed to acquire and read data on host, but I failed with FFT data so please have see on my screen shot (attached) of my block diagram and help me with the right procedure I have to follow to succeed :

I configured the FFT : 1024 length and READ fifo ad IMG fifo with 8192 (1024 * 8 channels) target to host

On the host I got only vibration data 8 channels with U32dataFIFO but for FFT I got nothing. I'm sure that the problem comes from FPGA VI so please give me the right procedure to follow for computing 8 channels FFT on deltasigma VI .

Thanks !!!

[GabeG]

Hi,

   I think you need to use the "ready for input" and "input valid" FFT inputs to handshake your data in. You will probably need another FIFO and since its going to be asynchronous, you might as well put it in another loop. Just as a test, I would suggest removing the scaled window vi, and wiring a true constant to the input ready input of the FFT. I'm guessing the input ready input is false by default and no data is getting into the FFT, by wiring it true, 1024 points will accumulate and the FFT will begin and at some point output ready will become true and start filling the FIFO to the computer. Another test would be to wire a true constant to the output FIFO case structure and see what you get.

A bigger problem is your desire to calculate 8 simultanous FFT's. That's gonna take some resources. Because the FFT works point by point, by putting it in a for loop you're actually calculating one FFT with your data channels interleaved. The only way I can imagine meeting your requirements is to load each channel into a FIFO, then create 8 separate loops (these can run as fast as possible, probably much faster tahn 51.2 kHz) which read from the individual FIFO's and perform the FFT. You then need 8 FIFO's to the computer. The only alternative, if your FFT loop can run at Mhz on your device, would be to use one FFT loop, one FIFO to the computer and a scheduler to decide which channel is being processed at any given time.

All that being said. At 51,200 hz x 8 channels, you only need to calculate 448 FFT's that are 1024 in length per second. My computer can do that in 25 - 50 ms, so there is no obvious need to do it on the FPGA, if you're going to immediately transfer it to the computer.

Have fun getting it working for at least one channel on the FPGA, I know how satisfying that is after all the compiling and such ;0

Good luck!

[IYED]

Thaks GabeG , Basically my optimal goal was to send 8 channels data to the host (crio 9024 real time) compute FFT on real time using sound and vibration for embedeed monitoring (power spectrum VI N channels) and send data and FFT for all channels via stream network to ,a host computer. the problem was that the fpga generating data (the producer) is too fast, so from the real time side (the consumer) the loop can't process data at the right time (can't follow) so you can imagine the result (the data will be overwritten on RT fifo or queue : I used this to transfer acquired data locally between two loops on RT) So now i choose to compute the FFT on FPGA then apply FFT to spctrum on RT side to resolve this issue BUT if you have an idea also to compute FFT simultanously on RT side without having a problem of producer consumer it will be perfect for me. I was surprised with results because my crio 9024 is powerful so computing 8 FFT (length= number of samples per channels) simultanously is easy for it. 

[preston_johnson]

consider doing the FFTs on the RT controller.  When you use the Waveform Reference Design:

https://forums.ni.com/t5/Example-Code/Reference-Application-for-NI-CompactRIO-Waveform-Acquisition/t...

You get a base FPGA architecture, with power left over on the RT controller for doing FFTs. 

If you need optimized FFTs, consider the Sound and Vibration Measurement Suite, which includes optimizeed FFTs for CompactRIO

https://forums.ni.com/t5/Past-NIWeek-Sessions/Using-CompactRIO-and-LabVIEW-for-Online-Signal-Process...

These two items will get you to "market" quickly. 

Good luck!

[IYED]

Hi Preston , thanks for your reply. I already read "the Waveform Reference Design" and as you can see on the screen shot of my RT code (RT side.png)  I follow procedures but the problem is how can I avoid this problem of producer consumer between  the two loops because I tried several times to increase RT fifo size or queues and facing allways the same problem (data overwritten) because producer is too fast so do you have a suggestion to overcome this problem. what is wrong on my code ?

Thanks  

[preston_johnson]

Thanks for the note, I am glad to see you are using the Waveform reference, and the producer consumer with the lossy queue as a FIFO. 

I see you are placing the resulting data on a graph.  The RT controllers are not really optimized for graphics on their front panel.  Could you try replacing the graphs with the raw data types (waveform array, spectrum array).  Then we can see whether your consumer loop can keep up.    You might also consider increasing the number of data points (read larger blocks from the DMA FIFO)  in your FFT, loop so that the consumer loop is called less frequently.  This might also help. 

[IYED]

Thank you again for your fast reply. I'm using graph just to view the exactitude of data it's more helpful but ok Im gonna remove them. I think you found the right problem : increasing the number of data points (read larger blocks from the DMA FIFO)  in FFT, but How can I do this !!! (please have a see on my new screen shot of code new code.png) because there is no input for data to read on the power spectrum.vI so it will automaticcaly take the length of signal as length of FFT (5120 for each channel spectrum I think)  (my rate is 51200HZ with 5120 samples per cahnnels *8) so how can I increase the number of data points to consume more data.

Thanks 

[GabeG]

Hi,

   The first test I would do on the RT system is to make a simple benchmark vi which calculates the power spectrum of an array of your specified size (1024 x 8), 50 times. Use timers to determine how long it takes. Then try two loops, each processing an array which is (1024 x 4) and see if you get any bump from parallelism. I looked up your controller, but couldn't find the exact processor beyond it being PowerPC and 512 MB of RAM. That processor may not do FFT well or the power spectrum vi your using may not compile efficiently on the PowerPC.

I see one possible issue which may be causing all your trouble, please check... I don't use the reference waveform add on, but it is similar to DAQmx. In DAQmx when you setup for continuous acquisition, the read inside the acquisition loop returns whatever samples are in the buffer. It doesn't wait for the buffer to be full. So if you set the buffer at 1024 and you start reading in a loop that is real fast, you may only get 10, 20, 50 samples. The read might have an input for the number of samples to get, but I don't think it will help much. Instead, if you need to get every single sample, you should concatenate your reads until you have 1024, then put it in the queue. Or you could have an intermediate loop which takes samples from the acquisition queue, packs them to (1024 x 😎 and then puts them into a second queue to go to the FFT loop. I could imagine if the power spectrum vi is getting oddly sized arrays (not 2^n), it will slow down. This is easy to check, just put an array size inside the FFT loop. If you don't need to guarantee that every sample is captured, you could use finite samples acquisition and just keep restarting it.

Also, with 512 MB of RAM you can afford to increase your queue size to 100 which might help if your producer to consumer ratio is fluctuating and hitting overflow intermittently.

You can do the FFT on the FPGA, get it working on one channel, it will be gratifying!

[IYED]

Hi GabeG, basically my real duty is to compute the FFT of 8 cahnnels at rate of 51200hz this is an obligation but the length of FFT I choose 1024 while I tried to compute on FPGA side because the length should be a power of 2. Any way Now I change my idea and try to compute FFT on RT side so the FFT length will be (number of sampels per cahnnel for each FFT channel I guess) 5120 in my actual case.

[GabeG]

Hi,

    I'm guessing based on your code that you want the power spectrum of each of the 8 channels simultaneously, but the channels are independent. You will display 8 different spectrums simultaneously, is this correct? One other thing to check is that the power spectrum is one dimensional and being calculated in the long direction (1024 and not 8). 1024 is a good length which results in 50 spectrums per second about the limit for displaying every single spectrum. You could go up to 2048 which will still be fast enough to display continuously but give you a little more frequency detail.

I suggest you try some benchmarking code on the RT system, see the attached block diagram image. Of course you would use your power spectrum vi and not FFT.