How to generate an analog biphasic single pulse

[uewlu]

Yeah, I guess I should be mentioned the card. I am using a Mseries 6259 card. Actually there are two of them connected to the PC. I am using labview 8.6 and the file that you just gave me cannot be opened using that. Is there a way that you can possibly save it using another compatibility mode?

[johnsold]

Here is a version for LV 8.6.

It is always helpful when you post a question to provide a summary of the DAQ hardware or instruments you are using,the LV version and the computer OS.  Many times the response depends on that information and if someone has to ask for it, that just delays the answer.

Lynn

[uewlu]

Thanks for the help Lynn, I have been running and tweakingthe program ever since you posted. Although it serves the basic purpose, the program that is needed in the lab here requires a little bit more control over the parameters.

I have finally devised a double buffer system whereby a hardware controll triggering mechanism can be set up. Finally after a day's work, I have assembled a vi that generates digital pulses at percised harware timed using counters in the board.

But now, the challenge comes to configure this vi with my main vi, ie, to control the sampling AO clock with this triggering pulses. In other words, imagine the digital pulse vi generates 3 pulses with the same pulse width as my analog output. But now I need these three pulses to act triggering sources for sampling in my AO clock, ie, the # of pulses should equal the sampling rate.

I am attaching a .zip file that I made so that it easier to understand.

[johnsold]

I do not have DAQmx so I cannot help with those details.  Perhaps someone else will have some ideas.

If you put error in and error out terminals in your subVIs, you can use those to eliminate the need for a sequence structure.

Lynn

[uewlu]

Actually I put in the sequence structure because I was having timing issues with the vi. I needed some aspects of it to run first and then the others in a sequence. Will the error in and out terminal force it to do that?

[johnsold]

Yes.

This is basic dataflow, the fundamental paradigm of LabVIEW.  Simply: a node (subVI, function, case structure, ...) cannot run until data is available at all its inputs.  Similarly, no data is available at its outputs until it has completed execution.  Also, ANY node which has data available at all its inputs may run, meaning that position on the diagram does not necessarily correlate with execution order.

If you have not done so, please look at the online tutorials for LV.

Lynn