IMAQ Vision in FPGA LabVIEW

[symlet]

Hi all;

I have design host.vi that consists of imaq vision vi. Then, when I try to run the host.vi (after I compile fpga.vi) this error come out:

"Deploying IMAQ create IMAQ create loaded with errors on the target and was closed. LabVIEW: Failed to load shared library nivissvc.*:LV_Create:C.Ensure that the library is present on the RT target. Use MAX to install NI software/FTP to transfer custom libraries to the RT target."

As I know, IMAQ vi is not supported with FPGA. So, in this design, I use IMAQ vi at the host.vi and the data will give to the fpga.vi. The question is:

• Why the error occurred?
• Is it we need to use camera when we use the IMAQ vision? I just want to use image in database only.

Anyone experts please advice. Thank you

[TiTou]

I've never used FPGA but I use IMAQ a lot, I think the image control is part of the IMAQ functions and not part of LabVIEW so if it's true that IMAQ is nor supported in LabVIEW FPGA then that could explain the error.

If your host VI runs on a non-FPGA target, load the image from a file and then send the image data to FPGA I guess you should first cast the datatype from IMAQ image to something else before sending it oto FPGA, can you show the code that does the image transfert on the host vi side AND on the FPGA side?

For you second question, you don't absolutely need a camera, you can load images from file.

Hope this helps a bit

[Christian Mergl]

Out of the error message I would guess you are using a cRIO Target and your Host.vi runs at the RT Controler of the cRIO, where NI IMAQ seems not to be installed.

Can you give us a bit more information on your system setup?

Christian

[symlet]

I use NI-sbRIO9632. I attach the project explorer of the project. I am new with all this, hope your guides. Thanks

[TiTou]

After a quick search "install IMAQ on CompactRIO" I found that : http://www.ni.com/white-paper/10867/en

So there should be hope for you.

Good luck!

[symlet]

Thanks for the link TiTou, I will study on that.

[symlet]

I have solved the problem. But, know when I run the host.vi, the output not come out and also the picture not appeared. Actually, I try to design a simple host.vi and fpga.vi by passing the image pixels to fpga. Then the pixels are send back to host. I attach the vi. Anyone please advise. Need helps,thank you

[Christian Mergl]

In your FPGA vi you just read the elements from the host and write the actual iteration # of the loop back to the host.

And why do you have an Stop Button at the FPGA vi, this is not necessary.Also in the host vi there are serveral issues.

If you would have enough time and basic knowlege in FPGA and RT programming with LabVIEW, maybe the people in this forum could help you to get a working solution.

However, if you really need a fast and working solution, call your local NI Office and ask for an Startup Assistence. An NI Engineer will assist you with the design.

Christian 

[symlet]

Hi Christian_M,

Thanks for your advise. I have redesign my VI in which I not use the IMAQ tools now. The design run/compile without error and the image and pixel values are displayed in host. But, the output from FPGA is only displayed one pixel value not the whole pixel values. Why? Is it I do a wrong wiring for the VI? Please advise,thank you.

[Christian Mergl]

Symlet,

you will need to create a kind of handshaking to check when the image data got transfered to the FPGA. So the easiest way would be to make the DMAs size at the host as big as the size of an image.

Then you send the complete image with one DMA Write to the FPGA. There you check for an underflow using the TimedOut to tell the host that you have received the image, so the host can go ahead and receive the manipulated image. At the sime time manipulate the image data at the FPGA and send it back to the host with the other DMA channel.

In your FPGA vi you just read one element after another and write it back to the host without taking care of the image size.

Christian