Image/Sprite Display on FPGA

[peabody_bass]

Awhile back I created a system that used a FPGA to generate a VGA signal for low latency visual-stimulus display.  It originally just displayed squares, and was later upgraded to support rectangles and rotation.

We would now like to display an actual image.  I think the only issue I'm running into is transferring the pixel-data array from the host (a realtime controller) to the FPGA (PXI-7813R).  I'd like to start with a 100x100 pixel image, which would require a 10,000 element array (of U8).  The transfer rate doesn't have to be fast; I'd transfer just a single image before a trial began and it would be displayed statically.

What transfer mechanism would work for this?  The FPGA doesn't support statically-sized arrays this big.  BlockRAM only works within the context of the FPGA.  FIFO's are no good because the same data has to be present for many VGA clock cycles/frames.  DRAM isn't available on that FPGA (as far as I can tell).

Any ideas?  If DRAM is the answer, I could probably swing a new FPGA purchase.  Thanks.

-Joe

[T-REX$]

You most definitely want to avoid that type of array in the FPGA... especially on the Front Panel for communication.

You will want to use FIFOs here: I would transfer the data using FIFOs, and then read chunks of that data into Block Memory (not DRAM) on your FPGA target.

Basically, use the "Get Number of Elements to Read" Fifo property, wait until you hit 10k elements or more, then read out 10k into your sprite buffer (again, you'll want to implement this using BRAM memory items). 

I'm not sure what all you're doing on the FPGA, but that 7813 is pretty small and old... and if you want a bunch of these sprites, you could run out of room fairly quickly.