Implement Finite State Machine (FSM) controllers on cRIO/FPGA?

[Spencer86c]

I'm trying to implement FSM controllers (ultimately for power systems) on the cRIO/FPGA. Also looking for helpful examples in this region that fully use the FPGA for what it's worth; where most/all the logic is on the FPGA and the interface is on the cRIO.
  Thanks,
      -Spencer86c

[Yi Y]

Hi Spencer,
The implementation of an FSM on the FPGA is very similiar to regular LabVIEW programming.  LabVIEW ships with an FSM template.  You can go to File->New...->VI->From Template->Frameworks->Design Patterns->Standard State Machine.vi.
When you mentioned using the FPGA for what it's worth, I'm not quite sure exactly which area you are thinking about. How the FPGA is utilized is entirely dependent on your program. An FPGA is certainly capable of handling a simple state machine and I/O.  The more logic you put into your program, the more complex your FSM can get and the more you'll have to consider space vs. speed optimization.
If you are doing DAQ like operations, I suggest searching for "intelligent daq personality" at ni.com, and you will find quite a few resources regarding using FPGA with a DAQ personality.
Hope this helps!


Yi Y.
Applications Engineer
http://www.ni.com/support