Is this possible with labview and crio

[gemma1212]

Hi,

I am glad that we finished our data-logger code.  Now its all running, logging and we could view the logged data by tdms viewer.

Now we thinking to purchase the equipment we don't have already and the  code implementation in real application. But before this, I am not sure if we could achieve the switching principle of logging for real application.

I mean while preparing code and during testing stage, we were switching the logging by means of a toggle switch on front panel which is inside an event structure on block diagram. In application, we want to have an external button to trigger this behaviour.

Any ideas guys??

Ta

[Dominic.Walker]

Hey Gemma,

If you have a spare DIO line, you could wire a switch between your 5V line on the card to a DIO line that reads.  Then when the switch is connected, the 5Vs is passed into the DIO line, and a true is read.  Some DIO cards might not have a 5V line, in this case you will need to write a true to a DIO line and connect a switch between this and a DIO line set to read.  

Let me know if I've explained this well enough for you!

Cheers,

[gemma1212]

Thanks Domininc,

I dont have 5 Volts DIO lines I guess. I am working with cRIO and there are many spare C series input and outputs available.

Do you mean connect a switch between one of the digital input and common? If so, what are the options to call the digital input in the host VI as a switch?

I think if this is possible then in our application, it would be a read input in host VI and it would respond to user's activity on the switch - I mean switching it on and off. For other data we wired the data to FIFOs and then we decimated the data in host. Does this mean extend the decimate for another output and connect a digital input on FPGA VI?? I would want to keep the switch data seperate from the other data though, Is it possible?

Thanks for help.

Ta

[Dominic.Walker]

Hey Gemma,

Yes, if you configure a digital C series card with 2 spare lines so that one is an output with a constant true, and one is an input channel that is read in a loop, you can connect a switch between them.  When the switch is pressed, the input channel will read a true.  You can use this to trigger the write to file.  Some digital cards will have a +V line on them, if you have one that does - you can use this instead of the output with a constant true.  In your VI, you would be constantly reading a digital input, and perhaps wiring the value you read into a case structure or something similar.  You can use FIFO's to pass this data back.  Alternatively you can write it to your front panel of the FPGA VI, then on the Real Time side, open an FPGA VI reference (found on the FPGA Interface pallete) and then read the front panel object using the read/write VI.

Kind regards,