LabVIEW FPGA: How to programatically determine top level clock speed from host VI?

[SeanDonner]

As the subject states, rather than hardcode the Top Level Clock speed of the FPGA, I would think there would be a way to programatically determine what the clock speed of a given FPGA is via an 'Open FPGA' reference.  However, I've yet to find such a thing, at least on the 2010 SP1 FPGA module.  Am I hunting down a ghost?

[Josh_B1]

Hi SiegeX,

One option would be to place an FPGA Clock Constant in the FPGA code and then create an indicator that would pass the value to the host VI. 

Regards,

Josh B

[SeanDonner]

Hi Josh,  you mean something like this?

[Josh_B1]

HI SiegeX,

That is correct. You can then pass the source to the RT VI using  the FPGA Open VI Reference and a Read/Write Control.

Regards,

Josh B.

[SeanDonner]

I gave this solution a shot and for some reason, I do not see an entry for "FPGA Clock" when I instantiate a Read/Write node on the Host VI.  I even tried wrapping it inside a cluster with a dummy boolean member just for fun and the cluster did not show up either.  In case it matters, the host VI is running on XP and not on RT because all it does is send down configuration before startup and monitor during running, there is no need for determinisim in this application. 

[Josh_B1]

Hi Siege,

Did you define which FPGA VI to reference in the RT code?

Regards,

Josh B