LabVIEW FPGA: The compilation failed due to timing violations.

[MyrzaMBM]

Hello, 

i have a problem with the compilation on fpga.

I have already compiled this Vi several times and it worked perfectly.

I added an INPUT in a loop and since it displays this error!

What is the problem ??

Thank you,

[Hooovahh]

FPGA development can be a bit fragile as you approach any of the resource limitations (of which there are many).  That error in particular can come from the FPGA not being able to guarantee the timing propagation of the traces in the hardware.  It takes time for a signal to travel down a wire and go to the various functions, and this timing becomes difficult as you get many functions chained together.  I'm not saying this is the case for you, but when I've seen this in the past, I had a single cycle timed loop with too much stuff in the loop.  Everything in there just couldn't execute at the rate the loop was trying to go.  My solution was to pipeline the operation and use a shift register so that not everything needed to happen in one loop.

I'd also look at the build output and look at your resources to see if you are approaching some limitation.  Refactoring the code is often a good way to improve efficiency.