Hi all,
While working on an FPGA project, I found out something very weird. I created a host vi, target vi and subvi under the target. This subvi is located in a for loop which is in the target vi.
With the target vi and subvi's closed, I ran the host vi. The following is a part of the target vi.

The problem is the subvi was not ran while both interrupts were asserted. Since they are in the flat sequence, the order is 1st interrupt - subvi with a loop - 2nd interrupt.
However, it seems the subvi keeps being skipped.
When with the target vi and subvi opened backgrounds, the subvi is ran. I don't know why they are different. Shouldn't it be the same wheter they are opened or not?
Thank you in advance.