LabVIEW: Feedback node and case structure execution within a loop

[wsimpson0050]

I have a while loop, inside the while loop I have a flat sequence structure, inside that is a case structure that returns the time it started executing (on first pass) and then only records ADC samples on all other passes. I would like to execute the case structure on every PPS and return the time every second. I was hoping I could just use a sample feedback node implementation, but I guess not. In all, I am trying to execute the case structure every PPS. 

[altenbach]

Can you spell out all acronyms, such as "PPS"?

[wsimpson0050]

Yes, I apologize, PPS stands for Pulse Per Second. The ADC (NI-9215) is sampling at 100Khz (once every 10,000ns).

[MECSO]

Where is the PPS variable written? I cannot see it.

[GerdW]

Hi w,

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@wsimpson0050 wrote:

I have a while loop, inside the while loop I have a flat sequence structure, inside that is a case structure that returns the time it started executing (on first pass) and then only records ADC samples on all other passes.

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Why do you need a shift register, that goes TRUE with the 2nd iteration AND a feedback node that goes FALSE with the 2nd iteration?

One of them would be enough…

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@wsimpson0050 wrote:

I would like to execute the case structure on every PPS and return the time every second. I was hoping I could just use a sample feedback node implementation, but I guess not. In all, I am trying to execute the case structure every PPS. 

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There is the "x!=y?" indicator, that is TRUE when the "PPS TimeStamp" value changes: why don't you use this a scondition when to execute the case?

[wsimpson0050]

My apologies. 

[wsimpson0050]

This example is from the cRIO data logger with GPS synchronisation and timing - NI Community 

On their FPGA they want to get the 'Time Started (ns)' as the first sample on the first run and never worry about calling that 'Time Started (ns)' again unless the FPGA is re-ran. I want to call 'Time Started (ns)' every second on the second.

*All of this timing stuff is in nanoseconds from January 1, 1970*  

Currently (in reference to this picture above), with the way I have it, the way it runs is it gets a 'PPS timestamp (TAI)' adds 1 second (or 1,000,000,000 ns) and sets that as the start time (it has to be a future time or else the FPGA will show 'Running Late?'), it then adds 10,000ns (or 10us) to allow it to sample at 100khz. It the executes the case structure on the first run and returns the 'time started (ns)' which runs correctly on the first run and is exactly on a PPS, in nanoseconds(ns) (or for example 1761315823000000000ns which in this case would be Friday, October 24, 2025 2:23:43 ON THE SECOND and not 2:23:43.7483) and this is perfect. 

So, what is happening is that, currently it is starting on a 'PPS timestamp (TAI)' like 1761315823000000000ns (where the 3 represents the second). What I would then like for it to do is call that case structure again on the next PPS like 1761315824000000000ns which should exactly line up with 100,000th sample of the acquisition. I have tried what you said

"There is the "x!=y?" indicator, that is TRUE when the "PPS TimeStamp" value changes: why don't you use this a scondition when to execute the case?" 

But it is not landing exactly on a PPS, it is landing on something like 1761315824372363832ns. If it all works correctly it should execute like:

read 'PPS Timestamp (TAI)' (1761315823000000000ns)

*take 100,000 samnples*

read 'PPS Timestamp (TAI)' (1761315824000000000ns)

*take 100,000 samnples*

read 'PPS Timestamp (TAI)' (1761315825000000000ns)

*take 100,000 samnples*

read 'PPS Timestamp (TAI)' (1761315826000000000ns)

*take 100,000 samnples*

.

.

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