LabView FPGA ERROR:place:543

[ragu_C]

Hi folks, While i'm compiling my FPGA vi, i have got the device utilization report as 76%...while phase 13.9(during mapping) calculation i'm getting Error:Map:543. placement constraint error..Give me a solution to resolve this issue... Thanks in Advance....

[Christian Mergl]

Hey,

What software and driver version are you exactly using?

What is the hardware you are using?

Do you see this with a certain VI or with every VI you try to compile?

Christian

[ragu_C]

Hi,

Thanks for your response....

i'm using LV 8.6.1 and RIO version is 3.1.0.

H/Ws are

Controller - cRIO-9014

Chassis - 9114

AI - 9205

AO - 9263

DO - 9476

DI - 9425

Basically i have two FPGA VIs. One VI which just fetches the AO channels' offset & LSB and i could compiled it. Another one i have put the FIFO and other main logics and that could not be compiled..

Here i have attached the compilation summary which i got...

Thanks....

[Christian Mergl]

Hi,

So the problem is just with a specific VI. Could you post your VI here?

Christian

[ragu_C]

Hi Folks, 

I've got through from my issue. The culprit is FPGA compiler which i brought with my LV DVD pack..Finally i reinstalled LV with another pack.

Thanks a lot!!!!