11-14-2015 10:46 AM
I've created a Labview FPGA .vi using a flat sequence structure that reads the output of a sensor at a 1kHz sample rate over a digital SPI. After the read, I write the fixed point data into a FIFO, which is read by a Host vi and ultimately written to hard disk for post processing. I need to add some averaging logic to the FPGA vi to further process the signal. I want to continue to output the original 1kHz sampled datat to the FIFO, but also perform some averaging on the measurements and write those results at the same 1kHz rate to the FIFO. The averaging functionality I want to implement is a two step process. Step 1 is to take the 1kHz samples and perform a frame based average of 16 samples. In other words, I want to sum 16 1kHz samples and divide the result by 16 and decimate at 16:1, which produces 62.5Hz data. Step 2 is to take the 62.5Hz sampled data and perform a moving average of 16 samples on this data and output that result at the same 62.5Hz sample rate. I want this 62.5Hz sampled data to be injected into the FIFA along with the original (unmodified) 1kHz sampled data at the 1kHz rate.
I've got Step 1 working properly using the "Mean, Variance, StdDev FPGA vi" block with number of samples set to 16. This block is running inside one of the sequences of the flat sequence structure after I receive each 1kHz sample over the SPI. My struggle is with the step 2 moving average functionality. I'm attempting to use the code in the screenshot below, but am unclear as to how/where to implement this logic, within either my flat sequence structure a separate while loop, case structure, etc, to ensure that it is only operating on one of the 62.5Hz samples at that data rate at a time. I've tried putting it inside the sequence that is running the mean block and further within a case structure that is driven by the "output valid" boolean of the mean block. I obviously don't fully understand how these different loops execute, because this isn't working properly. Can someone tell me how to implement the moving average logic into my existing FPGA vi to yield the desired results as described above? Screenshot below of the moving average (Step 2) logic I'm attempting to use. Also, find attached my VIs. The FPGA vi that I need the help with is "CA215_SPI.vi" and the host level vi is "Host.vi". Thanks in advance.
Joel
Solved! Go to Solution.
11-16-2015 10:39 AM
This question is closed. I realized my implementation approach was in fact working. I just had a dumb mistake on my fixed point output bit size, which was giving me errenous results.
11-17-2015 10:37 AM
Could you plesae help me with my code, I am trying to do a integral using FPGA, but the for loop is giving me error!
thanks
11-18-2015 08:18 AM
I can't open your vi, because i have an older version of Labview (13.0f2).