Hello,
First of all I have to thanks all the people here for their help. I have one question which is more basic and i need some information on that topic for my program implementation in Labview FPGA.
As we know we have 3 DMA channel to transfer data from FPGA to host in labview fpga programming. And in my design I am using all of them to transfer data from the fpga to host for storing it on the disk. But the problem is that if I am working with only 2 DMA channels then the output seems good without disturbance and no spikes in the output(missing cycle or missing data) analysis is done while connecting channels to the fiction generator. But as soon as I am including 3rd DMA FIFO my output is getting disturbed and i am getting spikes on the output. So please let me know if this is problem of hardware or software. Because at the software side I have checked each option but problem is still their.
So please if you have such exp then please let me know where is the problem.
Looking forward for reply.
Have a nice day;
Thanks in advance.
