03-15-2011 08:33 PM
Guess I should post my code but my host program passes an Boolean Array into my FPGA, the FPGA sets the booleans to HI/LO and then passes back the status of booleans Hi/Lo, then I use a shift register in the main while loop to pass the complete boolean array out of the end of the while loop and back to the beginning and do the next iteration.
I should mention I have a mulitple CASE STRUCTURE inside the WHILE LOOP that the boolean array also gets passed thru but only certain cases change the state of the boolean.
Problem: Seems like this works about 99% of the time but occasionally if ran the boolean values can flip to the opposite state?
Has any one experience this? I will post my code tomorrow.
thanks for any help!
03-17-2011 09:52 AM
I have searched around a bit here and haven't heard of anything like this before.
I'll take a look at your code once you post it.
03-18-2011 07:32 AM
Hello,
We now have it working properly not quite sure what fixed we did eliminate the shift register by splitting the FPGA Read and FPGA write I think the communications between LabVIEW host program and the FPGA have some async behavior.
re
I would be interested to know exactly how that is happening I assume some of the IRQ or PXI backplane lines are used for this ?
thanks
JS
03-21-2011
04:09 PM
- last edited on
08-25-2025
05:50 PM
by
Content Cleaner
Hi JS,
Take a look at this document:
http://www.ni.com/pdf/manuals/370489g.pdf
Page 2-1 Figure 2-1 and figure 2-2 should hopefully answer your question.
Thanks,
Dave T.