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Map Vars to Scalars in FPGA


@ZYOng wrote:

FPGA is not the only approach. In fact, it is not a flexible way.

In Scan Mode, NI-9871 can be accessed by NI-VISA driver, as shown in Solved: NI 9871 best way to create customization to veristand

If you want to avoid creating a custom device, you can still use the VeriStand Instrument Addon custom device

 

Based on your frame format [0xAA, Var1_LSB, Var1_MSB, Var2_LSB, Var2_MSB, Var3_LSB, Var3_MSB, 0xAA], here is the result.

You can import the attached configuration when adding the CD. Remember to change it to VISA.

ZYOng_0-1750250143960.png

 


Update

I found the Issue and fix it, Scan mode is running at Veritsand

miko7985_0-1750333920067.png


these are the correct value, but after some time the values get shuffled (currently i am sending stream of same constants)

miko7985_0-1750334162732.png


Thanks

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Try the steps in Error -1073807246: The Resource Is Valid, but VISA Cannot Currently Access It

-------------------------------------------------------
Applications Engineer | TME Systems
https://tmesystems.net/
-------------------------------------------------------
https://github.com/ZhiYang-Ong
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@ZYOng wrote:

Try the steps in Error -1073807246: The Resource Is Valid, but VISA Cannot Currently Access It


Thank you

i solved this issue earlier as i noted in my second reply, and encountered another the VARs seems ok at beginning then get shuffled after some time, i am just sending same array of constants repeatedly and even decreased the baud rate to 9600

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RS-485 is typically used in a two-way master-slave model and is less common in one-way streaming.

Looks like the NI-VISA might have been confused with the 0xAA header and footer. If you have control over the sender, I would recommend trying to remove the header character and replace the footer termination character with something unlikely to appear in the variable.

-------------------------------------------------------
Applications Engineer | TME Systems
https://tmesystems.net/
-------------------------------------------------------
https://github.com/ZhiYang-Ong
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