Hi,
I am trying to capture amplitude (Peak) values of a serial data line that is coming in to a RS-485 IC. Which later connects to FPGA DIO input and the same line is jumped to an analog input on the same FPGA. All the calculations are taking place on FPGA. (HW: sbRIO:9638). Idea is to send the data down to PC only when IC is in receiving state and send only the peak values. (Not recording everything in a FIFO, using a front panel indicator)
Signal transmission speed: 5Mhz, it can contain up to 32bits of data. When no data is transmitted line sits in a Z state, so the line goes to 0 only when a low bit is transmitted. Only time a peak value can be seen is when a bit is high (a bit will be high only for 200ns, bits would be longer but data keeps updating).
I could use the Min Max VI, that does the job but its output is fixed, some times could be faulty due to a spike, cannot perform further analysis on voltage data such as measuring a mean/Standard deviation value. Also it is expected to show dynamic voltage data to the end user on the UI.
So I came up with some ideas and I think I have a decent solution (Approach 5), please see the attached VI. But I was hoping if there is a better way to approach this. Attached VI demonstrate exactly what I would see on the UI.
EDIT: All this because there are times when the peak voltage value would be lower due to a bad IC, which is what I am looking for. Say good IC=4.5V bad is below 4V.
Thanks for reading!
