Tom,
The answer to your question depends on the hardware architecture and unfortunately isn't that easy to infer from the documentation. In general, the digital I/O pins on the connector of your hardware are either directly connected to I/O pins on the FPGA, or they are connected to a smaller number of pins on the FPGA through some additional circuitry. In the latter case, this connection effectively forms an I/O bus and data is communicated from the FPGA to the I/O through a bus transaction. In the case of the 9477, there are 32 lines on the front I/O connector. If you look at the connector on the back of the module connecting it to the FPGA backplane, you will notice there are fewer than 32 pins. In this case, it is impossible for the FPGA to write I/O data to the module directly so it must communicate the data using a defined bus protocol. This means each invocation of the I/O Node on the FPGA block diagram will result in a unique bus transaction where all of the channels included in the node will be updated at the same time. To be explicit, if you're trying to update channels 1 and 2, they will get updated at the exact same instant in time if you have a single I/O Node which includes both channels. However, if you instead use two I/O nodes (one with channel 1 and the other with channel 2) to write to the channels, channel 1 will get updated through one bus transaction, and channel 2 will get updated a little later in time through a second bus transaction. On the other hand, if the hardware architecture is such that the I/O is directly connected to the FPGA, there is no difference in behavior whether the channels are split across severall I/O Nodes or whether they are included in a single I/O Node.
Perhaps the best way to determine whether the digital I/O is directly connected to the FPGA is to right click the digital I/O item in the project and look at its property page. If you don't see an option in the property page for arbitration, then the digital I/O is most likely communicating to the FPGA through a bussed connection and is always arbitrating for use of the bus. Hopefully this information helps clear up some of your questions.
