Hi,
I'm programming a big application with a state machine architecture. My program is working well alone but when I add it the RT part of my FPGA project, nothing is working but no error are detected by Labview. It is like if there was no queue generated when I produce an event.
The VI has no dependency to the cRIO. It is pratically only play with a tab control.
Attached to this message, you have the VI and the project. I suggest you to run the VI (B2G_state_machine_16_test.vi) and avoid to push on the ''Parametrage'' and '' Lecture'' buttons (I did put the called files).
I don't know what's wrong since every time that I add VI to a project it was working well.
Thank you
