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NI 6036E question CMOS/TTL

I'm a consultant, and I'm trying to characterize how the digital
input/ouput features of the card are working. I noticed from
specification sheets that the card should be capable of CMOS/TTL
inputs, but I'm not sure how to get the card into either mode. So
far, I found that anything lower than 1.2 volts is a 0, and anything
higher than 1.8 volts returns a 1. The region in between these two
data points is usually undetermined, and I see the drivers toggling
between 0 and 1.

Anyone know how to program the card for TTL operation? That's what
I'm really looking to do with this board.

Bob
RTCubed Consulting, LLC
http://www.rtcubed.com/software-consulting.html
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Hello Bob,

Honestly, that is a very good question. So far, I have only worked with TTL signals, but you are right, in the specs its specified that the boards support both standards. Let me get back to you on this one tomorrow.

Thanks,

LA
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Hello Bob,

After reading a lot about CMOS and TTL, and the way they work in our boards, here is the answer to your question. As you may know, the differences between CMOS compared to TTLs are:

1. More expensive on a component basis.
2. Usually less expensive on a system level, because CMOS chips are smaller and require less regulation.
3. Lower currents require less power supply distribution, therefore causing a simpler and cheaper design.
4. Due to longer rise and fall times, the transmission of digital signals become simpler and less expensive.

So when it's mentioned that our boards are compliant to both standards it means that it will recognize a TTL and a CMOS signal. Below you will find the characteristics of TTL and CMOS:

Characteristics of
CMOS logic:
1. Dissipates low power: The power dissipation is dependent on the power supply voltage, frequency, output load, and input rise time. At 1 MHz and 50 pF load, the power dissipation is typically 10 nW per gate.
2. Short propagation delays: Depending on the power supply, the propagation delays are usually around 25 nS to 50 nS.
3. Rise and fall times are controlled: The rise and falls are usually ramps instead of step functions, and they are 20 - 40% longer than the propagation delays.
4. Noise immunity approaches 50% or 45% of the full logic swing.
5. Logic levels in a CMOS system will be essentially equal to the power supplies since the input impedance is so high.

Characteristics of TTL logic:
1. Power dissipation is usually 10 mW per gate.
2. Propagation delays are 10 nS when driving a 15 pF/400 ohm load.
3. Logic levels vary from 0 to 5 Volts.

So, a signal with any of the described characteristics will be recognized by any of our boards compliant to TTL and
CMOS.

If you have any further questions, please let me know.

Thanks,

LA
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