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Nested timed loops?

I'm still trying to get up to speed on labview/labview RT so please bear with me. Ultimately what I would like to do is have a structure where every 20ms a calculation is performed that transfers the output to an inner loop that repeats 2500 times at 1us per loop (using the output from the outer loop to compare to the iteration of the inner loop to generate a high or low value). Can I nest timed loops to do this? Is there a better way to accomplish this?

 

I am using a PXI 8106, m-series daq card and labview realtime to accomplish this.

 

Thanks,

 

Chris

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bump

 

Anyone?

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I believe so, have you tried it and had trouble?

 

Ben

Retired Senior Automation Systems Architect with Data Science Automation LabVIEW Champion Knight of NI and Prepper LinkedIn Profile YouTube Channel
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I've tried it but I've had issues deploying my code to labview RT . . . still trying to get up to speed with all I need to do to make my code RT ready. So much info up on this NI site and it is a bit overwhelming . . . anyone know of a good set of basic labview RT .VIs to get me through setup?

 

Anyway, I was hoping to get a confirmation that it would work and was a reasonable practice, or, if not, a suggestion for another way to accomplish what I am trying to do.

 

Thanks,

 

Chris

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Chris-

I believe there may be a better way to accomplish this task.  I would suggest using 2 timed loops in parallel with an RT FIFO set up to transfer data between the two loops.  This way you can set up the timing associated with each loop individually.  Please look at the LabVIEW 2009 Help link below for more information on RT FIFOs.

LabVIEW 2009 Help: RT FIFO Functions
http://zone.ni.com/reference/en-XX/help/370622G-01/lvrtvihelp/rtfifovipal/
Regards,

Mike S
NI AE
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Mike-

 

     Thanks for the link, but I don't think I want the loops to be syncronized and running at different rates. I want one of the loops to trigger the start of the other loop which will run at a faster rate than the triggering loop. I don't think FIFO helps here but I'm not sure.

 

-Chris

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I'm still chugging way at this with little success. At least I have code deploying to my RT target and running now, which was an embarssingly big step. I'm having difficulty figuring out how to get nested loop "action" in labview with output to a digital line. It appears that the timing of the pulses on the digital line depends on a sample clock that you specify, and once specifed, will continue outputting pulses regardless of the loop. Unless you start and stop the sample clock within the loop which seems to completely cripple loop times. 

 

Again, I am trying to ouput a .5 to 2.5ms width modulated pulse every 20 ms. I can do this if I simply use the entire 20ms as the PWM signal but since 2.5ms is such a small fraction of 20ms, the resolution is not that great. For instance, if I specify 8000pts in the digital line I am trying to output and run the clock at 400kHz to get the line to output every 20ms, I get 1000pt resolution over the 2.5ms band. Not bad, but I am using 70% of one processor. To drive 1 servo. I ultimately want to drive 8. If I drop the resolution to 500pts, 4000pts total, I use only 1% of the processor. But, it would be great to not have to output pulses for the full 20ms since I really only care about the first 2.5ms. Does anyone have ideas how to accomplish this?

 

I've attached two .vis. The first, servo_sine_2, uses a hardware clock off of a daq board to set the timing of the digital pulses and uses the processor clock to set the pulse array refresh (to track the sinusoid). The second, target - single rate, does not use anything to set the timing of the digital pulses and it seems that the program simply outputs the digital line as quickly as possible . . . not desireable.

 

Any ideas? 

 

Thanks,

 

Chris
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Chris-

After looking at your code more, I would suggest you use the clock source on your M Series board rather than your PXI controller.  This will reduce the CPU usage a lot.  Basically, you will want to use one of the counters on your board to generate a 1 MHz frequency clock signal (max speed for a 6221).  You can then use the internal output of this counter as your sample clock for your digital line.  As far as your signal goes, you should create a cycle of your PWM signal and write that to the buffer on the card.  You can then simply call that code over and over again to generate your signal. 

I have found some code that is similar to what you are doing on our Community (linked below).  This is for finite output, therefore you will need to modify this to be continuous.  You can do this by changing the “DAQmx Timing VI” and by replacing the “DAQmx Wait Until Task Done.VI” with a while loop and “DAQmx Is Task Done.vi”.  You can then simply deploy this code to your PXI controller and run it in Real-Time. 

NI Community: Correlated Digital I/O Using the Frequency Generator With M Series
http://decibel.ni.com/content/docs/DOC-6114

Regards,

Mike S
NI AE
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