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Problem with run VI on FPGA Crio

Hello,

 

my project consists of two VIs, one on FPGA work on Crio and the other main VI running on PC, the first sending data to the other via DMA FIFO. At the moment I have a problem with Main VI not running Vi on FPGA part.
I have already tried various Open FPGA settings and reference functions but none of them work. Maybe someone knows where the problem might be?

 

Thanks

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Hi Domen,

 


@DomenRupnik wrote:

my project consists of two VIs, one on FPGA work on Crio and the other main VI running on PC, …
I have already tried various Open FPGA settings and reference functions but none of them work. Maybe someone knows where the problem might be?


That "main VI" should run on your cRIO! Then it is no problem to open the FPGA VI reference…

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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I moved "main VI" to Crio but I still don't get data from Fpga VI via DMA FIFO to Main VI (FPGA VI reference is created and also the start button is set to true)

 

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